<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<title>OpenShoe: sysclk.h File Reference</title>

<link href="tabs.css" rel="stylesheet" type="text/css"/>
<link href="doxygen.css" rel="stylesheet" type="text/css" />

<link href="search/search.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="search/search.js"></script>
<script type="text/javascript">
  $(document).ready(function() { searchBox.OnSelectItem(0); });
</script>

</head>
<body>
<div id="top"><!-- do not remove this div! -->


<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  
  
  <td style="padding-left: 0.5em;">
   <div id="projectname">OpenShoe
   &#160;<span id="projectnumber">0.1</span>
   </div>
   
  </td>
  
  
  
 </tr>
 </tbody>
</table>
</div>

<!-- Generated by Doxygen 1.7.5.1 -->
<script type="text/javascript">
var searchBox = new SearchBox("searchBox", "search",false,'Search');
</script>
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
      <li><a href="modules.html"><span>Modules</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li class="current"><a href="files.html"><span>Files</span></a></li>
      <li>
        <div id="MSearchBox" class="MSearchBoxInactive">
        <span class="left">
          <img id="MSearchSelect" src="search/mag_sel.png"
               onmouseover="return searchBox.OnSearchSelectShow()"
               onmouseout="return searchBox.OnSearchSelectHide()"
               alt=""/>
          <input type="text" id="MSearchField" value="Search" accesskey="S"
               onfocus="searchBox.OnSearchFieldFocus(true)" 
               onblur="searchBox.OnSearchFieldFocus(false)" 
               onkeyup="searchBox.OnSearchFieldChange(event)"/>
          </span><span class="right">
            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
          </span>
        </div>
      </li>
    </ul>
  </div>
  <div id="navrow2" class="tabs2">
    <ul class="tablist">
      <li><a href="files.html"><span>File&#160;List</span></a></li>
      <li><a href="globals.html"><span>Globals</span></a></li>
    </ul>
  </div>
</div>
<div class="header">
  <div class="summary">
<a href="#define-members">Defines</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">sysclk.h File Reference</div>  </div>
</div>
<div class="contents">

<p>Chip-specific system clock management functions.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &lt;<a class="el" href="board_8h_source.html">board.h</a>&gt;</code><br/>
<code>#include &lt;avr32/io.h&gt;</code><br/>
<code>#include &lt;osc.h&gt;</code><br/>
<code>#include &lt;pll.h&gt;</code><br/>
<code>#include &lt;genclk.h&gt;</code><br/>
</div>
<p><a href="uc3c_2sysclk_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="define-members"></a>
Defines</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#a1e1d7eaa2a45333b24bbba2d9edb12d8">AVR32_PDCA_CLK_PBC</a>&#160;&#160;&#160;128</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#a2033d306bc2ba036e527d44646dafad9">AVR32_MDMA_CLK_PBC</a>&#160;&#160;&#160;129</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#a9c60604c1aea2360a48a0ea93da827e3">AVR32_USART1_CLK_PBC</a>&#160;&#160;&#160;130</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#a6bc6681a2dcf0960482cf587d1f00ba9">AVR32_SPI0_CLK_PBC</a>&#160;&#160;&#160;131</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#a14996800e45cf8ce3a59237d66de9a37">AVR32_CANIF_CLK_PBC</a>&#160;&#160;&#160;132</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#a0a62cca33dfc872eace7a76a614f143e">AVR32_TC0_CLK_PBC</a>&#160;&#160;&#160;133</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="uc3c_2sysclk_8h.html#ab66bb8270140c74f2fe0ac8dab2cc44c">AVR32_ADCIFA_CLK_PBC</a>&#160;&#160;&#160;134</td></tr>
<tr><td colspan="2"><div class="groupHeader">Configuration Symbols</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga7bb6bbe88b7fb398ef8f0befe936e0e7">CONFIG_SYSCLK_SOURCE</a>&#160;&#160;&#160;SYSCLK_SRC_RCSYS</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initial/static main system clock source.  <a href="group__sysclk__group.html#ga7bb6bbe88b7fb398ef8f0befe936e0e7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaf8bcf7e1ee2ebd2829ebc31be507c6da">CONFIG_SYSCLK_CPU_DIV</a>&#160;&#160;&#160;0</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initial/static CPU/HSB/PBB clock divider (log2)  <a href="group__sysclk__group.html#gaf8bcf7e1ee2ebd2829ebc31be507c6da"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaa952d8094a06be420e244e68286c2dbf">CONFIG_SYSCLK_PBA_DIV</a>&#160;&#160;&#160;0</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initial/static PBA clock divider (log2)  <a href="group__sysclk__group.html#gaa952d8094a06be420e244e68286c2dbf"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga50962c914daa31fbc279cd4bccf66f98">CONFIG_SYSCLK_PBB_DIV</a>&#160;&#160;&#160;0</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initial/static PBB clock divider (log2)  <a href="group__sysclk__group.html#ga50962c914daa31fbc279cd4bccf66f98"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaa31e8248ac7b461b19f7ec827674d16c">CONFIG_SYSCLK_PBC_DIV</a>&#160;&#160;&#160;0</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initial/static PBC clock divider (log2)  <a href="group__sysclk__group.html#gaa31e8248ac7b461b19f7ec827674d16c"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">System clock source</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga95a749ec308ac07efb9521f2f56ad351">SYSCLK_SRC_RCSYS</a>&#160;&#160;&#160;0</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">System RC oscillator.  <a href="group__sysclk__group.html#ga95a749ec308ac07efb9521f2f56ad351"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga40595c85aa33898ff3a6cfbd4f8ef7b9">SYSCLK_SRC_OSC0</a>&#160;&#160;&#160;1</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Oscillator 0.  <a href="group__sysclk__group.html#ga40595c85aa33898ff3a6cfbd4f8ef7b9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga9d44be291573208b5b1152f2b6ab1d3a">SYSCLK_SRC_OSC1</a>&#160;&#160;&#160;2</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Oscillator 1.  <a href="group__sysclk__group.html#ga9d44be291573208b5b1152f2b6ab1d3a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gacce44c311c87522d71fe51bf4cd37f58">SYSCLK_SRC_PLL0</a>&#160;&#160;&#160;3</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Phase Locked Loop 0.  <a href="group__sysclk__group.html#gacce44c311c87522d71fe51bf4cd37f58"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaa46c965047bb81e94066d8df57cb719f">SYSCLK_SRC_PLL1</a>&#160;&#160;&#160;4</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Phase Locked Loop 1.  <a href="group__sysclk__group.html#gaa46c965047bb81e94066d8df57cb719f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaa3b782df811d75bf3cf9f4ba8c2266b0">SYSCLK_SRC_RC8M</a>&#160;&#160;&#160;5</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">8 MHz RC oscillator  <a href="group__sysclk__group.html#gaa3b782df811d75bf3cf9f4ba8c2266b0"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">USB Clock Sources</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga2ba06598e685f870cb3f410f27d75703">USBCLK_SRC_OSC0</a>&#160;&#160;&#160;1</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Use OSC0.  <a href="group__sysclk__group.html#ga2ba06598e685f870cb3f410f27d75703"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga5fee2b76449663f9d6c8f7bb34782e77">USBCLK_SRC_OSC1</a>&#160;&#160;&#160;2</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Use OSC1.  <a href="group__sysclk__group.html#ga5fee2b76449663f9d6c8f7bb34782e77"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga969e47c6c1f1d38fd2afaf96f6187296">USBCLK_SRC_PLL0</a>&#160;&#160;&#160;3</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Use PLL0.  <a href="group__sysclk__group.html#ga969e47c6c1f1d38fd2afaf96f6187296"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gae76666294ec5d1ca2bcfa28061cfae3f">USBCLK_SRC_PLL1</a>&#160;&#160;&#160;4</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Use PLL1.  <a href="group__sysclk__group.html#gae76666294ec5d1ca2bcfa28061cfae3f"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clocks derived from the CPU clock</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga9cbdb318d23dda372bf52dd9b4eb14f5">SYSCLK_OCD</a>&#160;&#160;&#160;AVR32_OCD_CLK_CPU</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">On-Chip Debug system.  <a href="group__sysclk__group.html#ga9cbdb318d23dda372bf52dd9b4eb14f5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga619d74a2528721833b011475c6ea1b63">SYSCLK_SYSTIMER</a>&#160;&#160;&#160;AVR32_CORE_CLK_CPU_COUNT</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">COUNT/COMPARE system registers.  <a href="group__sysclk__group.html#ga619d74a2528721833b011475c6ea1b63"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clocks derived from the HSB clock</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga86f02a49fa416cb9618274517c7b6a1b">SYSCLK_SAU_HSB</a>&#160;&#160;&#160;(AVR32_SAU_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Access Unit HSB interface.  <a href="group__sysclk__group.html#ga86f02a49fa416cb9618274517c7b6a1b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga31a0491a42ddf97870b3218d66921f55">SYSCLK_PDCA_HSB</a>&#160;&#160;&#160;(AVR32_PDCA_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">PDCA memory interface.  <a href="group__sysclk__group.html#ga31a0491a42ddf97870b3218d66921f55"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaeb124548e5e161dfa5f3675721da8a82">SYSCLK_MDMA_HSB</a>&#160;&#160;&#160;(AVR32_MDMA_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">MDMA memory interface.  <a href="group__sysclk__group.html#gaeb124548e5e161dfa5f3675721da8a82"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga8853a36d0721737ccf4f7dfa2287c729">SYSCLK_USBC_DATA</a>&#160;&#160;&#160;(AVR32_USBC_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">USBC DMA and FIFO interface.  <a href="group__sysclk__group.html#ga8853a36d0721737ccf4f7dfa2287c729"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga72bf629f809d2df6ef9877b25712ba76">SYSCLK_CANIF_DATA</a>&#160;&#160;&#160;(AVR32_CANIF_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">CANIF DMA interface.  <a href="group__sysclk__group.html#ga72bf629f809d2df6ef9877b25712ba76"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaa4659bfb4205b768f6846cbfcc2ec7dd">SYSCLK_FLASHC_DATA</a>&#160;&#160;&#160;(AVR32_FLASHC_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash data interface.  <a href="group__sysclk__group.html#gaa4659bfb4205b768f6846cbfcc2ec7dd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga9e400e99e4e4b8f66b3a6d4c7b70611e">SYSCLK_PBA_BRIDGE</a>&#160;&#160;&#160;(AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">HSB&lt;-&gt;PBA bridge.  <a href="group__sysclk__group.html#ga9e400e99e4e4b8f66b3a6d4c7b70611e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaafe37377751bd916833b911fb54de660">SYSCLK_PBB_BRIDGE</a>&#160;&#160;&#160;(AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">HSB&lt;-&gt;PBB bridge.  <a href="group__sysclk__group.html#gaafe37377751bd916833b911fb54de660"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga94aa5b488b09dc743ddca6c884660873">SYSCLK_PBC_BRIDGE</a>&#160;&#160;&#160;(AVR32_HMATRIX_CLK_HSB_PBC_BRIDGE % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">HSB&lt;-&gt;PBC bridge.  <a href="group__sysclk__group.html#ga94aa5b488b09dc743ddca6c884660873"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaff6d7baf5d4926d22f50ca1bfb738424">SYSCLK_HSB_RAM</a>&#160;&#160;&#160;(AVR32_RAM_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">HSB RAM.  <a href="group__sysclk__group.html#gaff6d7baf5d4926d22f50ca1bfb738424"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga30be147da40e89c8ea7fa6fd0ed30129">SYSCLK_EBI</a>&#160;&#160;&#160;(AVR32_EBI_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">External Bus Interface.  <a href="group__sysclk__group.html#ga30be147da40e89c8ea7fa6fd0ed30129"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga15c11d0c318f04ca3169fda32aea1bee">SYSCLK_PEVC_HSB</a>&#160;&#160;&#160;(AVR32_PEVC_CLK_HSB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Peripheral Event Controller.  <a href="group__sysclk__group.html#ga15c11d0c318f04ca3169fda32aea1bee"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clocks derived from the PBA clock</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga14d03e228f6f595a55e1a76040b8f169">SYSCLK_INTC</a>&#160;&#160;&#160;(AVR32_INTC_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal interrupt controller.  <a href="group__sysclk__group.html#ga14d03e228f6f595a55e1a76040b8f169"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga0f033dbcbfbd2fa9aadc748fb5c18165">SYSCLK_PM</a>&#160;&#160;&#160;(AVR32_PM_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">PM/RTC/EIM configuration.  <a href="group__sysclk__group.html#ga0f033dbcbfbd2fa9aadc748fb5c18165"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga49fca3345f07667c997b5ad46db6245b">SYSCLK_SCIF</a>&#160;&#160;&#160;(AVR32_SCIF_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">System Control Interface.  <a href="group__sysclk__group.html#ga49fca3345f07667c997b5ad46db6245b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga6ad9b260e783734ef0e28bb7ac4284a7">SYSCLK_AST</a>&#160;&#160;&#160;(AVR32_AST_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Asynchronous Timer.  <a href="group__sysclk__group.html#ga6ad9b260e783734ef0e28bb7ac4284a7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gae1d87ae47bff0e2e4cab4b417cea4ab1">SYSCLK_WDT</a>&#160;&#160;&#160;(AVR32_WDT_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Watchdog Timer.  <a href="group__sysclk__group.html#gae1d87ae47bff0e2e4cab4b417cea4ab1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaee7a1048c289fa9dd6abf99eaf64fc46">SYSCLK_EIC</a>&#160;&#160;&#160;(AVR32_EIC_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">External Interrupt Controller.  <a href="group__sysclk__group.html#gaee7a1048c289fa9dd6abf99eaf64fc46"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga0bd4c7581ed295f5202efa0631dfe1aa">SYSCLK_FREQM</a>&#160;&#160;&#160;(AVR32_FREQM_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Frequency Meter.  <a href="group__sysclk__group.html#ga0bd4c7581ed295f5202efa0631dfe1aa"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaafd65ced01805e6f5dfbd3b08e9aa02c">SYSCLK_GPIO</a>&#160;&#160;&#160;(AVR32_GPIO_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">General-Purpose I/O.  <a href="group__sysclk__group.html#gaafd65ced01805e6f5dfbd3b08e9aa02c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaeeea970aa1d68f0726f6ac7b19882491">SYSCLK_USART0</a>&#160;&#160;&#160;(AVR32_USART0_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">USART 0.  <a href="group__sysclk__group.html#gaeeea970aa1d68f0726f6ac7b19882491"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gae2bb545878e7dc4040c1b1e9bab34cdd">SYSCLK_USART2</a>&#160;&#160;&#160;(AVR32_USART2_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">USART 2.  <a href="group__sysclk__group.html#gae2bb545878e7dc4040c1b1e9bab34cdd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga749a1c474f6bcdfb0c71e76d88371572">SYSCLK_USART3</a>&#160;&#160;&#160;(AVR32_USART3_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">USART 3.  <a href="group__sysclk__group.html#ga749a1c474f6bcdfb0c71e76d88371572"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga2981d1f5ff381253d3ca94c260bbba01">SYSCLK_SPI1</a>&#160;&#160;&#160;(AVR32_SPI1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Controller 1.  <a href="group__sysclk__group.html#ga2981d1f5ff381253d3ca94c260bbba01"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga8c2db97d4e5879b8e79271ad4317965c">SYSCLK_TWIM0</a>&#160;&#160;&#160;(AVR32_TWIM0_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">TWI Master 0.  <a href="group__sysclk__group.html#ga8c2db97d4e5879b8e79271ad4317965c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaa6b40c9fda3fc4cf86201bf5d35c60e4">SYSCLK_TWIM1</a>&#160;&#160;&#160;(AVR32_TWIM1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">TWI Master 1.  <a href="group__sysclk__group.html#gaa6b40c9fda3fc4cf86201bf5d35c60e4"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaacb0f0e01d42f813394a6dc51171d0f1">SYSCLK_TWIS0</a>&#160;&#160;&#160;(AVR32_TWIS0_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">TWI Slave 0.  <a href="group__sysclk__group.html#gaacb0f0e01d42f813394a6dc51171d0f1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga8949d9bb62e29e020979d3d428d8fb53">SYSCLK_TWIS1</a>&#160;&#160;&#160;(AVR32_TWIS1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">TWI Slave 1.  <a href="group__sysclk__group.html#ga8949d9bb62e29e020979d3d428d8fb53"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaba7d5c176ee1112b9f590ac775615e36">SYSCLK_PWM</a>&#160;&#160;&#160;(AVR32_PWM_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Pulse Width Modulator.  <a href="group__sysclk__group.html#gaba7d5c176ee1112b9f590ac775615e36"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gab8b5a16f6564fc83a5627c61468a635a">SYSCLK_QDEC0</a>&#160;&#160;&#160;(AVR32_QDEC0_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Quadrature Decoder 0.  <a href="group__sysclk__group.html#gab8b5a16f6564fc83a5627c61468a635a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga82dd53b7213f5e14889c11d00e9172e8">SYSCLK_QDEC1</a>&#160;&#160;&#160;(AVR32_QDEC1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Quadrature Decoder 1.  <a href="group__sysclk__group.html#ga82dd53b7213f5e14889c11d00e9172e8"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga03be785696a3e76b1b3c6ea6104ac630">SYSCLK_TC1</a>&#160;&#160;&#160;(AVR32_TC1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer/Counter 1.  <a href="group__sysclk__group.html#ga03be785696a3e76b1b3c6ea6104ac630"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga399953bbca8665cff37fd74a54196281">SYSCLK_PEVC_REGS</a>&#160;&#160;&#160;(AVR32_PEVC_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Peripheral Event Controller.  <a href="group__sysclk__group.html#ga399953bbca8665cff37fd74a54196281"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga3d96f4df476b374cae0653bb97b6afa9">SYSCLK_ACIFA0</a>&#160;&#160;&#160;(AVR32_ACIFA0_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Analog Comparator 0.  <a href="group__sysclk__group.html#ga3d96f4df476b374cae0653bb97b6afa9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gae446ad78f0e97d6284514f1f37b77b8e">SYSCLK_ACIFA1</a>&#160;&#160;&#160;(AVR32_ACIFA1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Analog Comparator 1.  <a href="group__sysclk__group.html#gae446ad78f0e97d6284514f1f37b77b8e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gaca3098d4d705c823acb5a2787a658b2f">SYSCLK_DACIFB0</a>&#160;&#160;&#160;(AVR32_DACIFB0_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">D/A Converter 0.  <a href="group__sysclk__group.html#gaca3098d4d705c823acb5a2787a658b2f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gabafc3d95b374fd0543a080132c6a123f">SYSCLK_DACIFB1</a>&#160;&#160;&#160;(AVR32_DACIFB1_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">D/A Converter 1.  <a href="group__sysclk__group.html#gabafc3d95b374fd0543a080132c6a123f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga70d3d2ecde2ee79e6cdf0ddf62c5ce14">SYSCLK_AW</a>&#160;&#160;&#160;(AVR32_AW_CLK_PBA % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">aWire UART  <a href="group__sysclk__group.html#ga70d3d2ecde2ee79e6cdf0ddf62c5ce14"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clocks derived from the PBB clock</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga47b081ba5de90a8ea89b8a844e82c14a">SYSCLK_FLASHC_REGS</a>&#160;&#160;&#160;(AVR32_FLASHC_CLK_PBB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash Controller registers.  <a href="group__sysclk__group.html#ga47b081ba5de90a8ea89b8a844e82c14a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga1f50b29ea7a96a6595b6256118ec6a34">SYSCLK_USBC_REGS</a>&#160;&#160;&#160;(AVR32_USBC_CLK_PBB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">USBB registers.  <a href="group__sysclk__group.html#ga1f50b29ea7a96a6595b6256118ec6a34"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga766dce154a1fb38bb35e6e98cd51a9b1">SYSCLK_HMATRIX</a>&#160;&#160;&#160;(AVR32_HMATRIX_CLK_PBB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">HSB Matrix configuration.  <a href="group__sysclk__group.html#ga766dce154a1fb38bb35e6e98cd51a9b1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gafe8483e2e78077a95841ccf52b2da1a5">SYSCLK_SAU_REGS</a>&#160;&#160;&#160;(AVR32_SAU_CLK_PBB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Access Unit register.  <a href="group__sysclk__group.html#gafe8483e2e78077a95841ccf52b2da1a5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga8425ce428af87e00693efc695ac3b73e">SYSCLK_SMC_REGS</a>&#160;&#160;&#160;(AVR32_SMC_CLK_PBB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Static Memory Controller registers.  <a href="group__sysclk__group.html#ga8425ce428af87e00693efc695ac3b73e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga386f643ce38c1c6721d07c559a70f365">SYSCLK_SDRAMC_REGS</a>&#160;&#160;&#160;(AVR32_SDRAMC_CLK_PBB % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">SDRAM Controller registers.  <a href="group__sysclk__group.html#ga386f643ce38c1c6721d07c559a70f365"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clocks derived from the PBC clock</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gac83d44e5be54c7b52b86deb4fc338516">SYSCLK_PDCA_PB</a>&#160;&#160;&#160;(AVR32_PDCA_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">PDCA peripheral bus interface.  <a href="group__sysclk__group.html#gac83d44e5be54c7b52b86deb4fc338516"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gabe01b7586526964dd55bc275e9d40f39">SYSCLK_MDMA_REGS</a>&#160;&#160;&#160;(AVR32_MDMA_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">MDMA registers.  <a href="group__sysclk__group.html#gabe01b7586526964dd55bc275e9d40f39"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga1acb0cc02d975a6d9d4e92e56a2438a0">SYSCLK_USART1</a>&#160;&#160;&#160;(AVR32_USART1_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">USART 1.  <a href="group__sysclk__group.html#ga1acb0cc02d975a6d9d4e92e56a2438a0"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga77679d8f496ed32ec8c2476fc28ecf45">SYSCLK_SPI0</a>&#160;&#160;&#160;(AVR32_SPI0_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Controller 0.  <a href="group__sysclk__group.html#ga77679d8f496ed32ec8c2476fc28ecf45"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gadf592c60fdfb5213d813f9b5c753f0f7">SYSCLK_CANIF_REGS</a>&#160;&#160;&#160;(AVR32_CANIF_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">CANIF registers.  <a href="group__sysclk__group.html#gadf592c60fdfb5213d813f9b5c753f0f7"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#gabe7aa477c7c5b3887df1d762a750b04a">SYSCLK_TC0</a>&#160;&#160;&#160;(AVR32_TC0_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer/Counter 0.  <a href="group__sysclk__group.html#gabe7aa477c7c5b3887df1d762a750b04a"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga6e40fd22e30fe8f7553443d88ee817aa">SYSCLK_ADCIFA</a>&#160;&#160;&#160;(AVR32_ADCIFA_CLK_PBC % 32)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">A/D Converter.  <a href="group__sysclk__group.html#ga6e40fd22e30fe8f7553443d88ee817aa"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="func-members"></a>
Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga74da4af4f93582fe3dd33dd75596cdf4">sysclk_priv_enable_module</a> (unsigned int bus_id, unsigned int module_index)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga9d3035baba081035de71adb2dd059ce7">sysclk_priv_disable_module</a> (unsigned int bus_id, unsigned int module_index)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga242399e48a97739c88b4d0c00f6101de">sysclk_init</a> (void)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the synchronous clock system.  <a href="group__sysclk__group.html#ga242399e48a97739c88b4d0c00f6101de"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">Querying the system clock and its derived clocks</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code. </p>
</div></td></tr>
<tr><td colspan="2"><div class="groupHeader">Enabling and disabling synchronous clocks</div></td></tr>
<tr><td colspan="2"><div class="groupHeader">System Clock Source and Prescaler configuration</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga9e93d93c137135fee8a1a7102367042e">sysclk_set_prescalers</a> (unsigned int cpu_shift, unsigned int pba_shift, unsigned int pbb_shift, unsigned int pbc_shift)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Set system clock prescaler configuration.  <a href="group__sysclk__group.html#ga9e93d93c137135fee8a1a7102367042e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sysclk__group.html#ga222a121dfaac21b0c0af9d4dcb39496c">sysclk_set_source</a> (uint_fast8_t src)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Change the source of the main system clock.  <a href="group__sysclk__group.html#ga222a121dfaac21b0c0af9d4dcb39496c"></a><br/></td></tr>
</table>
<hr/><a name="details" id="details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>Chip-specific system clock management functions. </p>
<p>Copyright (C) 2010 - 2011 Atmel Corporation. All rights reserved. </p>
</div><hr/><h2>Define Documentation</h2>
<a class="anchor" id="ab66bb8270140c74f2fe0ac8dab2cc44c"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_ADCIFA_CLK_PBC" ref="ab66bb8270140c74f2fe0ac8dab2cc44c" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_ADCIFA_CLK_PBC&#160;&#160;&#160;134</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a14996800e45cf8ce3a59237d66de9a37"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_CANIF_CLK_PBC" ref="a14996800e45cf8ce3a59237d66de9a37" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_CANIF_CLK_PBC&#160;&#160;&#160;132</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a2033d306bc2ba036e527d44646dafad9"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_MDMA_CLK_PBC" ref="a2033d306bc2ba036e527d44646dafad9" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_MDMA_CLK_PBC&#160;&#160;&#160;129</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a1e1d7eaa2a45333b24bbba2d9edb12d8"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_PDCA_CLK_PBC" ref="a1e1d7eaa2a45333b24bbba2d9edb12d8" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_PDCA_CLK_PBC&#160;&#160;&#160;128</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a6bc6681a2dcf0960482cf587d1f00ba9"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_SPI0_CLK_PBC" ref="a6bc6681a2dcf0960482cf587d1f00ba9" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_SPI0_CLK_PBC&#160;&#160;&#160;131</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a0a62cca33dfc872eace7a76a614f143e"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_TC0_CLK_PBC" ref="a0a62cca33dfc872eace7a76a614f143e" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_TC0_CLK_PBC&#160;&#160;&#160;133</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a9c60604c1aea2360a48a0ea93da827e3"></a><!-- doxytag: member="uc3c/sysclk.h::AVR32_USART1_CLK_PBC" ref="a9c60604c1aea2360a48a0ea93da827e3" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define AVR32_USART1_CLK_PBC&#160;&#160;&#160;130</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
</div>
<!-- window showing the filter options -->
<div id="MSearchSelectWindow"
     onmouseover="return searchBox.OnSearchSelectShow()"
     onmouseout="return searchBox.OnSearchSelectHide()"
     onkeydown="return searchBox.OnSearchSelectKey(event)">
<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Defines</a></div>

<!-- iframe showing the search results (closed by default) -->
<div id="MSearchResultsWindow">
<iframe src="javascript:void(0)" frameborder="0" 
        name="MSearchResults" id="MSearchResults">
</iframe>
</div>



<hr class="footer"/><address class="footer"><small>
Generated on Mon Dec 19 2011 21:04:53 for OpenShoe by &#160;<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/>
</a> 1.7.5.1
</small></address>

</body>
</html>
